This paper also shows a workingĮxample of this method being used in the verification of the next Workaround for this limitation is demonstrated using ModelSim'sįoreign Language Interface (FLI). Due to its implementation of file input/output (I/O) forīehavioral VHDL, ModelSim cannot read or write these FIFOs directly. With each other, a more accurate simulation of the final system can beĬreated and 4) Performance of the overall simulation can be increasedĮasily on a Single-System Image (SSI) cluster or multiprocessorĬomputer even though ModelSim's simulation engine is not multi. Rewriting 3) By having multiple Devices Under Test (DUT) communicate Programming language 2) It gives the verification engineer theĪbility to reuse standards-validation software packages with minimal The majorĪdvantages of this method are 1) Since only generic file operationsĪre used, the external application can be written in nearly any The mainĭifference between using FIFOs versus normal files for Inter-ProcessĬommunication (IPC) is that an application attempting to write to aįIFO is paused until another application attempts to read from theįIFO and vice-versa.
("FIFOs"), which appear as normal files to each application. ModelSim and the external program is accomplished by using Named Pipes ModelSim simulation via an external program. I've done searches on both StackExchange and google, but I have not been able to come up with a set of keywords to narrow my search enough to either identify the behavior I am looking for, or determine that it does not exist.Įxternal Control of a ModelSim Simulation Via Unix Named PipesĪbstract: In this thesis, we present a method of controlling a Text files require the inputs to be independent from the output. I need to have the software "write" values into the FPGA simulator, read the results, and then write new values into the FPGA which are dependent on the results it read. The trick that I cannot do with a text file input is have the two halves of the product interact. I'm wondering if Modelsim has a mode which allows you to hook up a pipe to an external application (such as our driver), and run a sort of distributed simulation where the software can push values into the testbench, then observe the results later. I know Modelsim supports a testbench which lets you provide stimulus in the form of a text file with times and values to input. To minimize integration risk, I would love to be able to model the interaction between the two halves of our product before putting it on hardware. The FPGA simulation is being done in Modelsim and driver software is written in C. I am working on a team that is doing both driver software and FPGA development.
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